VLSI Specification, Verification and Synthesis - Graham Birtwistle, P.A. Subrahmanyam - książka wyd. 1988

Opis

Graham Birtwistle’s VLSI Specification, Verification and Synthesis presents a comprehensive guide to the design of Very Large Scale Integration (VLSI) systems, covering the full process from initial specification to final implementation. The book begins with specification, explaining how to define both functional and non-functional requirements of a chip, and then moves to verification, showing how designers ensure that a design meets its requirements through simulation, formal methods, and timing analysis. Finally, it addresses synthesis, detailing how high-level hardware descriptions in languages like VHDL or Verilog are transformed into optimized logic circuits and ultimately into physical layouts for fabrication. Throughout, Birtwistle combines theoretical foundations with practical examples, making the book a valuable resource for students and engineers seeking to understand the methodologies, tools, and challenges involved in creating complex digital systems.